This device is a dual-channel isolated gate driver IC for driving Si MOSFETs in low-side, high-side, or half-bridge configurations. It uses on-chip coreless transformer isolation and provides 2.5 kVrms isolation with 3.4 mm input-to-output creepage and clearance. The output stage delivers typical peak source and sink currents of 5 A and 9 A, with typical propagation delays of 38 ns turn-on and 36 ns turn-off. It supports a 3 V to 17 V input supply, a 4.5 V to 20 V output supply for this 4 V UVLO variant, and operation across a -40 °C to 125 °C ambient range. The device also supports configurable dead time, active output clamping during UVLO conditions, and minimum 150 V/ns common-mode transient immunity.
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| Channels | 2 |
| Isolation voltage | 2.5kVrms |
| Input-to-output creepage | 3.4mm |
| Input-to-output clearance | 3.4mm |
| Input supply voltage | 3 to 17V |
| Output supply voltage | 4.5 to 20V |
| Output UVLO turn-on threshold | 4.2 typV |
| Peak source current | 5 typA |
| Peak sink current | 9 typA |
| Turn-on propagation delay | 38 typns |
| Turn-off propagation delay | 36 typns |
| Common-mode transient immunity | 150 minV/ns |
| Rise time | 7.5 typns |
| Fall time | 6 typns |
| Ambient operating temperature | -40 to 125°C |
| Minimum input pulse width | 17 typns |
| RoHS | Compliant |
These are design resources that include the Infineon 2EDB7259K
Application note for a 3.3 kW PSU (REF_3K3W_HFHD_PSU) with 98 W/inch³ power density, utilizing interleaved totem-pole PFC and GaN-based LLC stages for server applications.
