Automotive microcontroller targets instrument clusters and head-up display systems with integrated 2D and 2.5D graphics acceleration. The device combines a 240 MHz Arm Cortex-M7 CPU with a 100 MHz Arm Cortex-M0+ CPU for peripheral and security processing. Memory resources include 4160 KB code flash, 128 KB work flash, 384 KB SRAM, 64 KB ROM, and 2048 KB embedded video RAM. Interfaces include CAN FD, LIN, CXPI, 10/100 Ethernet, serial communication blocks, MIPI CSI-2 video input, and FPD-Link or parallel RGB video output. This variant uses a 272-BGA package, supports HSM security with RSA-3K, includes audio DAC, MIPI, and two video outputs, and is specified for the S-grade -40 °C to 105 °C temperature range.
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| Core architecture | Arm Cortex-M7 and Arm Cortex-M0+ |
| Maximum Cortex-M7 frequency | 240MHz |
| Maximum Cortex-M0+ frequency | 100MHz |
| Code flash | 4160KB |
| Work flash | 128KB |
| SRAM | 384KB |
| ROM | 64KB |
| Video RAM | 2048KB |
| Functional safety rating | ASIL-B |
| GPIO operating voltage | 2.7 to 5.5V |
| Core voltage VCCD | 1.09 to 1.21V |
| CAN FD channels | 4ch |
| CAN FD data rate | Up to 8Mbps |
| Ethernet MAC | 1 channel 10/100 |
| UART channels | 12ch |
| I2C channels | 11ch |
| SPI channels | 11ch |
| ADC | 12-bit, 1 Msps SAR ADC, 48 external channels |
| Package | 272-BGA |
| Operating temperature | -40 to 105°C |
These are design resources that include the Infineon CYT3DLBBHS
Release notes for ModusToolbox™ Programming tools v1.8.1, providing flash programming support for Infineon MCU families including PSOC Edge, XMC, TRAVEO T2G, and EZ-PD CCG.
