USB 3.2 Gen 2x2 peripheral controller supports device operation up to 20 Gbps with integrated 10 Gbps, 5 Gbps, and 480 Mbps PHYs. The controller integrates 150 MHz Arm Cortex-M4F and 100 MHz Arm Cortex-M0+ CPUs, 512 KB application flash, 128 KB SRAM, 128 KB ROM, and a 1 MB high-bandwidth buffer SRAM. Dual GPIF III interfaces support LVDS, subLVDS, and LVCMOS data paths for video, imaging, and data-acquisition applications. The device operates across 1.7 V to 3.6 V system supplies and uses a 169-ball, 10 mm × 10 mm × 1.2 mm FBGA package.
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| USB device speed | 20Gbps |
| USB standard | USB 3.2 Gen 2x2 |
| USB endpoints | Up to 30, 15 IN and 15 OUT |
| CPU core 1 | Arm Cortex-M4F at 150 MHz |
| CPU core 2 | Arm Cortex-M0+ at 100 MHz |
| Application flash | 512KB |
| SRAM | 128KB |
| ROM | 128KB |
| High-bandwidth buffer SRAM | 1MB |
| LVDS maximum lane rate | 1.25 DDR RXGbps |
| LVCMOS maximum RX clock | 160 DDR or SDRMHz |
| System operating voltage | 1.7 to 3.6V |
| Ambient operating temperature | -40 to 85°C |
| Package dimensions | 10 × 10 × 1.2mm |
| Ball pitch | 0.75mm |
These are design resources that include the Infineon CYUSB4024-BZXI
User guide for the KIT_FX20_FMC_001 development kit featuring the EZ-USB FX20 (CYUSB4024-BZXI) for high-speed USB 3.2 Gen 2x2 video and audio streaming applications.
Release notes for ModusToolbox™ Programming tools v1.8.1, providing flash programming support for Infineon MCU families including PSOC Edge, XMC, TRAVEO T2G, and EZ-PD CCG.
