This Field Programmable Gate Array (FPGA) offers 457,000 logic cells and 690,000 registers, built on 28nm process technology. It features 1152 pins in a 35x35mm Flip Chip Fine Pitch Ball Grid Array (FC-FBGA) package for surface mounting. Key capabilities include 552 user I/Os, 39936 Kbit of RAM, 1590 dedicated DSP blocks, and 36 transceiver blocks operating at up to 14.1 Gbps. The device supports multiple external memory interfaces, including DDR2/3 SDRAM and RLDRAM II/III, and integrates 2 Ethernet MACs. Operating temperature range is -40°C to 100°C.
PackageFC-FBGA
MountingSurface Mount
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Technical Specifications
Intel 5SGSMD5H2F35I2N technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FC-FBGA |
| Package Description | Flip Chip Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 1152 |
| PCB | 1152 |
| Package Length (mm) | 35 |
| Package Width (mm) | 35 |
| Package Height (mm) | 2.9 |
| Seated Plane Height (mm) | 3.4 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAR-1 |
| Family Name | Stratix® V GS |
| Maximum Number of User I/Os | 552 |
| Number of Registers | 690000 |
| RAM Bits | 39936Kbit |
| Device Logic Cells | 457000 |
| Process Technology | 28nm |
| Ethernet MACs | 2 |
| Number of Multipliers | 3180 (18x18) |
| Programmability | Yes |
| Transceiver Blocks | 36 |
| Transceiver Speed | 14.1Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 1590 |
| PCI Blocks | 1 |
| Speed Grade | 2 |
| Differential I/O Standards Supported | LVPECL|LVDS|HCSL |
| Single-Ended I/O Standards Supported | LVTTL|LVCMOS |
| External Memory Interface | DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|RLDRAM III|QDRII+SRAM |
| Device Number of DLLs/PLLs | 24 |
| Supported IP Core | Triple Speed Ethernet with 1588|Sub-frame Latency JPEG 2000 Encoder (BA130)|DDR4/3, LPDDR2/3 Multiport Memory Controller (UMMC) |
| Supported IP Core Manufacture | Altera/Barco Silex/Mobiveil, Inc |
| Total Number of Block RAM | 2014 |
Compliance
| Cage Code | 4BA62 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A001.a.7.b |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Intel 5SGSMD5H2F35I2N Datasheet
Download the complete datasheet for Intel 5SGSMD5H2F35I2N to view detailed technical specifications.
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