64-bit RISC microprocessor featuring a 2.6GHz clock speed and 32nm process technology. This dual-core processor operates at 1.5V and utilizes a Flip-Chip Land Grid Array (FCLGA) package with 1155 pins for surface mounting. Key specifications include 32KB instruction cache and 32KB data cache, with a DMI/PECI interface.
PackageFCLGA
MountingSurface Mount
Quick Jump:
Technical Specifications
Intel BX80623I32120T SR060 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | LGA |
| Package/Case | FCLGA |
| Package Description | Flip-Chip Land Grid Array |
| Lead Shape | No Lead |
| Pin Count | 1155 |
| PCB | 1155 |
| Package Length (mm) | 37.5 |
| Package Width (mm) | 37.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Core™ i3-2120T Processor |
| Data Bus Width | 64bit |
| Instruction Set Architecture | RISC |
| Device Core | Core i3 |
| Maximum Speed | 2600MHz |
| Process Technology | 32nm |
| Core Architecture | i3 |
| Number of CPU Cores | 2 |
| Interface Type | DMI/PECI |
| CAN | 0 |
| UART | 0 |
| USART | 0 |
| I2C | 0 |
| SPI | 0 |
| USB | 0 |
| Ethernet | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 1.52V |
| Instruction Cache Size | 32KB |
| Data Cache Size | 32KB |
| Multiply Accumulate | No |
Compliance
| Cage Code | 4BA62 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU |
Datasheet
Intel BX80623I32120T SR060 Datasheet
Download the complete datasheet for Intel BX80623I32120T SR060 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.