
64-bit RISC microprocessor featuring a 3.3GHz clock speed and 4 CPU cores. This surface-mount Flip-Chip Land Grid Array (FCLGA) package offers 1155 pins and is built on 22nm process technology. It operates at a maximum supply voltage of 1.52V and includes 32KB of instruction cache and 32KB of data cache.
Checking distributor stock and pricing after the page loads.
Sign in to ask questions about the Intel BX80637I53550 SR0P0 datasheet using AI. Get instant answers about specifications, features, and technical details, ideal for finding information in larger documents.
Sign In to ChatWidest selection of semiconductors and electronic components in stock and ready to ship ™
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | LGA |
| Package/Case | FCLGA |
| Package Description | Flip-Chip Land Grid Array |
| Lead Shape | No Lead |
| Pin Count | 1155 |
| PCB | 1155 |
| Package Length (mm) | 37.5 |
| Package Width (mm) | 37.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Core™ i5-3550 Processor |
| Data Bus Width | 64bit |
| Instruction Set Architecture | RISC |
| Device Core | Core i5 |
| Maximum Speed | 3300MHz |
| Process Technology | 22nm |
| Core Architecture | i5 |
| Number of CPU Cores | 4 |
| Interface Type | DMI/PECI |
| CAN | 0 |
| UART | 0 |
| USART | 0 |
| I2C | 0 |
| SPI | 0 |
| USB | 0 |
| Ethernet | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 1.52V |
| Instruction Cache Size | 32KB |
| Data Cache Size | 32KB |
| Multiply Accumulate | No |
| Cage Code | 4BA62 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 5A992.c |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU |
Download the complete datasheet for Intel BX80637I53550 SR0P0 to view detailed technical specifications.
The embedded preview will load automatically when this section scrolls into view.