Field Programmable Gate Array (FPGA) with 132,540 logic cells and 6589.7 Kbit of RAM. Features 252 multipliers (18x18) and 63 dedicated DSP blocks. Utilizes 90nm process technology and supports a maximum of 1126 user I/Os. Operates within a 0°C to 85°C temperature range and is housed in a 1508-pin FC-FBGA package. Supports multiple differential and single-ended I/O standards, along with external memory interfaces including DDR SDRAM and DDR2 SDRAM.
Checking distributor stock and pricing after the page loads.
Sign in to ask questions about the Intel EP2S130F1508C4NES datasheet using AI. Get instant answers about specifications, features, and technical details, ideal for finding information in larger documents.
Sign In to ChatWidest selection of semiconductors and electronic components in stock and ready to ship ™
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FC-FBGA |
| Package Description | Flip Chip Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 1508 |
| PCB | 1508 |
| Package Length (mm) | 40 |
| Package Width (mm) | 40 |
| Package Height (mm) | 3(Max) |
| Seated Plane Height (mm) | 3.5(Max) |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAU-1 |
| Family Name | Stratix® II |
| Maximum Number of User I/Os | 1126 |
| RAM Bits | 6589.7Kbit |
| Device Logic Cells | 132540 |
| Process Technology | 90nm |
| Number of Multipliers | 252 (18x18) |
| Programmability | No |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 63 |
| Speed Grade | 4 |
| Differential I/O Standards Supported | LVPECL|LVDS |
| Single-Ended I/O Standards Supported | LVTTL|CMOS|SSTL|HSTL |
| External Memory Interface | DDR SDRAM|DDR2 SDRAM|RLDRAM II|QDRII+SRAM |
| Device Number of DLLs/PLLs | 12 |
| Supported IP Core | Viterbi Compiler, High-Speed Parallel Decoder|RapidIO to AXI Bridge Controller (RAB)|PowerPC/SH/1960 System Controller|32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz |
| Supported IP Core Manufacture | Altera/CAST, Inc/Barco Silex/Mobiveil, Inc/Eureka Technology Inc/PLDA |
| Total Number of Block RAM | 6+609+699 |
| Cage Code | 4BA62 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A001.a.7.a |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Download the complete datasheet for Intel EP2S130F1508C4NES to view detailed technical specifications.
The embedded preview will load automatically when this section scrolls into view.
