EP3CLS150F780I7N

FPGA 150848 Cells 65nm 780-Pin FBGA 413 I/O

Field Programmable Gate Array (FPGA) with 150,848 logic cells and 5,994 Kbit RAM. Features 320 (18x18) multipliers and 666 total block RAM. Operates at 437.5MHz with 65nm process technology and supports a maximum of 413 user I/Os. Packaged in a 780-pin FBGA (29x29mm) for surface mounting, with a temperature range of -40°C to 100°C. Supports DDR2 SDRAM and QDRII+ SRAM external memory interfaces.

PackageFBGA

MountingSurface Mount

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Technical Specifications

Intel EP3CLS150F780I7N technical specifications.

General

Basic Package Type

Ball Grid Array

Package Family Name

BGA

Package/Case

FBGA

Package Description

Fine Pitch Ball Grid Array

Lead Shape

Ball

Pin Count

780

PCB

780

Package Length (mm)

Package Width (mm)

Package Height (mm)

1.75

Seated Plane Height (mm)

2.25

Pin Pitch (mm)

Package Material

Plastic

Mounting

Surface Mount

Jedec

MS-034AAM-1

Family Name

Cyclone® III LS

Maximum Number of User I/Os

413

RAM Bits

5994Kbit

Device Logic Cells

150848

Process Technology

65nm

Number of Multipliers

320 (18x18)

Programmability

Program Memory Type

SRAM

Min Operating Temperature

-40°C

Max Operating Temperature

100°C

Speed Grade

Differential I/O Standards Supported

Single-Ended I/O Standards Supported

External Memory Interface

DDR2 SDRAM|QDRII+SRAM

Device Number of DLLs/PLLs

Supported IP Core

Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Public Key Crypto Engine (BA414E)| 32|64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz

Supported IP Core Manufacture

Altera/CAST, Inc/Barco Silex/PLDA

Total Number of Block RAM

666

Compliance

Cage Code

4BA62

EU RoHS

Yes

HTS Code

8542390001

Schedule B

8542390000

ECCN

3A991

Automotive

AEC Qualified

PPAP

Radiation Hardening

RoHS Versions

2011/65/EU, 2015/863

Datasheet

This datasheet cannot be embedded due to technical restrictions.

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