Field Programmable Gate Array (FPGA) with 29,440 logic cells and 1080 Kbit RAM. Features 60nm process technology, 150 user I/Os, and 4 transceiver blocks operating at 3.125 Gbps. Includes 2 Ethernet MACs, 80 multipliers (18x18), and 1 PCI block. Packaged in a 324-pin FBGA (19x19x1 mm) for surface mounting.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Intel EP4CGX30CF19C8N technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
FBGA
Package Description
Thin Profile Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
324
PCB
324
Package Length (mm)
19
Package Width (mm)
19
Package Height (mm)
1
Seated Plane Height (mm)
1.4
Pin Pitch (mm)
1
Package Material
Plastic
Mounting
Surface Mount
Jedec
MO-192DAG-1
Family Name
Cyclone® IV GX
Maximum Number of User I/Os
150
RAM Bits
1080Kbit
Device Logic Cells
29440
Process Technology
60nm
Ethernet MACs
2
Number of Multipliers
80 (18x18)
Programmability
Yes
Transceiver Blocks
4
Transceiver Speed
3.125Gbps
Program Memory Type
SRAM
Min Operating Temperature
0°C
Max Operating Temperature
85°C
PCI Blocks
1
Speed Grade
8
Differential I/O Standards Supported
B-LVDS|HSTL|LVPECL|LVDS|RSDS|SSTL
Single-Ended I/O Standards Supported
LVTTL|LVCMOS|PCI|PCI-X|SSTL|HSTL
External Memory Interface
DDR2 SDRAM|QDRII+SRAM
Device Number of DLLs/PLLs
2
Supported IP Core
Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Sub-frame Latency JPEG 2000 Encoder (BA130)|PCI Express to AXI Bridge Controller (GPEX-PAB)|ISA/PC Card/PCMCIA/Compact Flash Host Adapter
Supported IP Core Manufacture
Altera/CAST, Inc/Barco Silex/Mobiveil, Inc/Eureka Technology Inc
Total Number of Block RAM
120
Compliance
Cage Code
4BA62
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
ECCN
3A991
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Intel EP4CGX30CF19C8N Datasheet
Download the complete datasheet for Intel EP4CGX30CF19C8N to view detailed technical specifications.
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