Complex Programmable Logic Device (CPLD) featuring 980 macrocells and 127 logic elements, built on 0.18um process technology. This device offers 1270 logic cells and 212 user I/Os, operating at up to 304MHz. It supports 2.5V and 3.3V supply voltages and is housed in a 256-pin, 17x17mm Fine Pitch Ball Grid Array (FBGA) package for surface mounting. In-system programmability is supported, with a speed grade of 3 and an operating temperature range of 0°C to 85°C.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Intel EPM1270F256C3NES technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 256 |
| PCB | 256 |
| Package Length (mm) | 17 |
| Package Width (mm) | 17 |
| Package Height (mm) | 1.25 |
| Seated Plane Height (mm) | 1.75 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAF-1 |
| Family Name | MAX® II |
| Device Logic Cells | 1270 |
| Number of User I/Os | 212 |
| Number of Logic Blocks/Elements | 127 |
| Number of Macro Cells | 980 |
| Program Memory Type | Flash |
| Process Technology | 0.18um |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Typical Operating Supply Voltage | 2.5|3.3V |
| Min Operating Supply Voltage | 2.375V |
| Programmability | Yes |
| In-System Programmability | Yes |
| Speed Grade | 3 |
Compliance
| Cage Code | 4BA62 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Datasheet
Intel EPM1270F256C3NES Datasheet
Download the complete datasheet for Intel EPM1270F256C3NES to view detailed technical specifications.
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