Complex Programmable Logic Device (CPLD) featuring 192 macrocells and 240 device logic cells, offering 80 user I/Os. This surface-mount component utilizes 0.18um process technology and operates at a typical 1.8V supply voltage, with a minimum of 1.71V. Housed in a 100-pin TFBGA package (11x11x1mm), it supports in-system programmability and operates across a temperature range of -40°C to 100°C.
PackageTFBGA
MountingSurface Mount
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Technical Specifications
Intel EPM240GF100I4NES technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Profile Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 11 |
| Package Width (mm) | 11 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.4 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-192DAC-1 |
| Family Name | MAX® II |
| Device Logic Cells | 240 |
| Number of User I/Os | 80 |
| Number of Logic Blocks/Elements | 24 |
| Number of Macro Cells | 192 |
| Program Memory Type | Flash |
| Process Technology | 0.18um |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Typical Operating Supply Voltage | 1.8V |
| Min Operating Supply Voltage | 1.71V |
| Programmability | Yes |
| In-System Programmability | Yes |
| Speed Grade | 4 |
Compliance
| Cage Code | 4BA62 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Intel EPM240GF100I4NES Datasheet
Download the complete datasheet for Intel EPM240GF100I4NES to view detailed technical specifications.
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