Complex Programmable Logic Device (CPLD) featuring 192 macro cells and 240 logic cells. This device operates with a typical supply voltage of 2.5V or 3.3V and utilizes 0.18um process technology. It offers 80 user I/Os and is housed in a 100-pin Thin Quad Flat Package (TQFP) with a 0.5mm pin pitch, suitable for surface mounting. The CPLD supports in-system programmability and operates within a temperature range of -40°C to 100°C.
PackageTQFP
MountingSurface Mount
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Technical Specifications
Intel EPM240T100I5NES technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
QFP
Package/Case
TQFP
Package Description
Thin Quad Flat Package
Lead Shape
Gull-wing
Pin Count
100
PCB
100
Package Length (mm)
14
Package Width (mm)
14
Package Height (mm)
1
Seated Plane Height (mm)
1.1
Pin Pitch (mm)
0.5
Package Material
Plastic
Mounting
Surface Mount
Jedec
MS-026AED
Family Name
MAX® II
Device Logic Cells
240
Number of User I/Os
80
Number of Logic Blocks/Elements
24
Number of Macro Cells
192
Program Memory Type
Flash
Process Technology
0.18um
Min Operating Temperature
-40°C
Max Operating Temperature
100°C
Typical Operating Supply Voltage
2.5|3.3V
Min Operating Supply Voltage
2.375V
Programmability
Yes
In-System Programmability
Yes
Speed Grade
5
Compliance
Cage Code
4BA62
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU
Datasheet
Intel EPM240T100I5NES Datasheet
Download the complete datasheet for Intel EPM240T100I5NES to view detailed technical specifications.
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