Complex Programmable Logic Device (CPLD) from the MAX® II family, featuring 440 macro cells and 570 device logic cells. This surface-mount component utilizes 0.18um process technology and operates at 2.5V/3.3V. It offers 160 user I/Os and is housed in a 256-pin Fine Pitch Ball Grid Array (FBGA) package measuring 17mm x 17mm x 1.25mm. Programmable and in-system programmable, it supports a temperature range of -40°C to 100°C.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Intel EPM570F256I4NES technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 256 |
| PCB | 256 |
| Package Length (mm) | 17 |
| Package Width (mm) | 17 |
| Package Height (mm) | 1.25 |
| Seated Plane Height (mm) | 1.75 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAF-1 |
| Family Name | MAX® II |
| Device Logic Cells | 570 |
| RAM Bits | 0Kbit |
| Number of User I/Os | 160 |
| Number of Logic Blocks/Elements | 57 |
| Number of Macro Cells | 440 |
| Program Memory Type | Flash |
| Process Technology | 0.18um |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Typical Operating Supply Voltage | 2.5|3.3V |
| Min Operating Supply Voltage | 2.375V |
| Programmability | Yes |
| In-System Programmability | Yes |
| Speed Grade | 4 |
Compliance
| Cage Code | 4BA62 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Datasheet
Intel EPM570F256I4NES Datasheet
Download the complete datasheet for Intel EPM570F256I4NES to view detailed technical specifications.
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