
Programmable Logic Device (PLD) featuring 192 macrocells and 3750 gates. This CMOS device operates with a propagation delay of 20ns, supporting a maximum frequency of 90.9MHz. It offers 124 programmable I/Os and is housed in a 160-pin Ceramic PGA package. Operating supply voltage ranges from 4.5V to 5.5V, with a typical 5V requirement.
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| Package/Case | PGA |
| Frequency | 83.33MHz |
| Lead Free | Contains Lead |
| Max Frequency | 90.9MHz |
| Max Operating Temperature | 85°C |
| Max Supply Voltage | 5.5V |
| Memory Type | EEPROM, |
| Min Operating Temperature | -40°C |
| Min Supply Voltage | 4.5V |
| Mount | Surface Mount, Through Hole |
| Number of Gates | 3750 |
| Number of I/Os | 124 |
| Number of Logic Blocks (LABs) | 12 |
| Number of Logic Elements/Cells | 12 |
| Number of Macro Cells | 192 |
| Number of Macrocells | 192 |
| Number of Programmable I/O | 124 |
| Operating Supply Voltage | 5V |
| Package Quantity | 21 |
| Packaging | Tray |
| Propagation Delay | 20ns |
| Radiation Hardening | No |
| RoHS Compliant | No |
| Series | MAX® 7000 |
| Speed Grade | 20 |
| Turn-On Delay Time | 20ns |
| RoHS | Not CompliantNo |
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