64-bit microprocessor featuring a 45nm process technology and a maximum speed of 2500 MHz. This 4-core processor utilizes a Flip-Chip Land Grid Array (FCLGA) package with 771 pins, designed for surface mounting. It offers a 32KB instruction cache and 32KB data cache, with operating supply voltages ranging from 1.155V to 1.605V.
PackageFCLGA
MountingSurface Mount
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Technical Specifications
Intel EU80574KJ060N SLANV technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | LGA |
| Package/Case | FCLGA |
| Package Description | Flip-Chip Land Grid Array |
| Lead Shape | No Lead |
| Pin Count | 771 |
| PCB | 771 |
| Package Length (mm) | 37.55(Max) |
| Package Width (mm) | 37.55(Max) |
| Package Height (mm) | 4.32(Max) |
| Seated Plane Height (mm) | 4.32(Max) |
| Pin Pitch (mm) | 1.09|1.17 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Xeon® Processor E5420 |
| Data Bus Width | 64bit |
| Device Core | Xeon |
| Maximum Speed | 2500MHz |
| Process Technology | 45nm |
| Number of CPU Cores | 4 |
| Interface Type | PECI |
| CAN | 0 |
| UART | 0 |
| USART | 0 |
| I2C | 0 |
| SPI | 0 |
| USB | 0 |
| Ethernet | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 1.155|1.35|1.605V |
| Instruction Cache Size | 32KB |
| Data Cache Size | 32KB |
| Multiply Accumulate | No |
Compliance
| Cage Code | 4BA62 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.1 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Datasheet
Intel EU80574KJ060N SLANV Datasheet
Download the complete datasheet for Intel EU80574KJ060N SLANV to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.