
Dual JK flip-flop with reset, negative-edge triggered, featuring two independent JK flip-flops. This CMOS logic IC operates with a supply voltage range of 2V to 6V, typically 5V, and supports a maximum frequency of 24MHz. It offers a propagation delay of 16ns and is housed in a 14-pin TSSOP (SOT-402) surface-mount package. The component provides 5.2mA of low-level output current and -5.2mA of high-level output current, with a wide operating temperature range from -40°C to 125°C.
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NXP 74HC107PW,112 technical specifications.
| Package/Case | SOT-402 |
| Clock Edge Trigger Type | Negative Edge |
| Frequency | 24MHz |
| High Level Output Current | -5.2mA |
| Input Type | SINGLE-ENDED |
| Logic Function | Flip-Flop |
| Low Level Output Current | 5.2mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -40°C |
| Max Supply Voltage | 6V |
| Min Supply Voltage | 2V |
| Mount | Surface Mount |
| Number of Bits | 2 |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Operating Supply Voltage | 5V |
| Package Quantity | 2400 |
| Packaging | Rail/Tube |
| Polarity | Non-Inverting |
| Propagation Delay | 16ns |
| Radiation Hardening | No |
| RoHS Compliant | Yes |
| Technology | CMOS |
| Turn-On Delay Time | 240ns |
| RoHS | Compliant |
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