
CMOS D-type flip-flop latch with positive edge clock triggering. Features 6 bits per element, 6 input lines, and 6 output lines. Operates with a 3.3V supply voltage, supporting a range from 1V to 5.5V, and offers a maximum frequency of 30MHz. This surface mount component is housed in a TSSOP package, with a propagation delay of 16ns and a turn-on delay of 26ns. It supports output currents of 12mA (low) and -12mA (high), with an operating temperature range of -40°C to 125°C.
NXP 74LV174PW,112 technical specifications.
| Package/Case | TSSOP |
| Clock Edge Trigger Type | Positive Edge |
| Frequency | 30MHz |
| High Level Output Current | -12mA |
| Input Type | SINGLE-ENDED |
| Logic Function | D-Type, Flip-Flop |
| Low Level Output Current | 12mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -40°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 1V |
| Mount | Surface Mount |
| Number of Bits | 6 |
| Number of Bits per Element | 6 |
| Number of Circuits | 1 |
| Number of Elements | 1 |
| Number of Input Lines | 6 |
| Number of Output Lines | 6 |
| Operating Supply Voltage | 3.3V |
| Package Quantity | 96 |
| Packaging | Rail/Tube |
| Polarity | Non-Inverting |
| Propagation Delay | 16ns |
| Radiation Hardening | No |
| RoHS Compliant | Yes |
| Series | 74LV |
| Technology | CMOS |
| Turn-On Delay Time | 26ns |
| RoHS | Compliant |
Download the complete datasheet for NXP 74LV174PW,112 to view detailed technical specifications.
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