
Octal D-type transparent latch IC featuring 8 bits, 8 input lines, and 8 output lines with 3-state output. This CMOS logic IC operates with a supply voltage range of 1V to 5.5V, typically 3.3V, and offers a propagation delay of 12ns. Designed for surface mounting in a TSSOP package with gold contact plating, it supports a high level output current of -16mA and a low level output current of 16mA. Operating across a temperature range of -40°C to 125°C, this non-inverting latch is RoHS compliant.
Sign in to ask questions about the NXP 74LV573PW,112 datasheet using AI. Get instant answers about specifications, features, and technical details, ideal for finding information in larger documents.
Sign In to ChatWidest selection of semiconductors and electronic components in stock and ready to ship ™
NXP 74LV573PW,112 technical specifications.
| Package/Case | TSSOP |
| Contact Plating | Gold |
| High Level Output Current | -16mA |
| Independent Circuits | 1 |
| Logic Function | D-Type, Latch |
| Low Level Output Current | 16mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -40°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 1V |
| Mount | Surface Mount |
| Number of Bits | 8 |
| Number of Circuits | 8 |
| Number of Elements | 1 |
| Number of Input Lines | 8 |
| Number of Output Lines | 8 |
| Operating Supply Voltage | 3.3V |
| Output Type | 3-STATE |
| Package Quantity | 75 |
| Packaging | Rail/Tube |
| Polarity | Non-Inverting |
| Propagation Delay | 12ns |
| Quiescent Current | 160uA |
| RoHS Compliant | Yes |
| Series | 74LV |
| Technology | CMOS |
| Turn-On Delay Time | 24ns |
| RoHS | Compliant |
Download the complete datasheet for NXP 74LV573PW,112 to view detailed technical specifications.
The embedded preview will load automatically when this section scrolls into view.
