N-channel Silicon Junction Field-Effect Transistor (JFET) designed for through-hole mounting. Features a 3-pin TO-92 package with a plastic single-ended leaded construction. Offers a maximum drain-source voltage of 40V and a maximum power dissipation of 400mW. Operates across a wide temperature range from -65°C to 150°C.
PackageSPT
MountingThrough Hole
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Technical Specifications
NXP J113,126 technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | TO-92 |
| Package/Case | SPT |
| Package Description | Plastic Single Ended Leaded (Through Hole) Package |
| Lead Shape | Through Hole |
| Pin Count | 3 |
| PCB | 3 |
| Package Length (mm) | 4.8(Max) |
| Package Width (mm) | 4.2(Max) |
| Package Height (mm) | 5.2(Max) |
| Seated Plane Height (mm) | 7.7(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | TO-92 |
| Channel Type | N |
| Configuration | Single |
| Maximum Drain Source Voltage | 40V |
| Maximum Gate Source Voltage | -40V |
| Maximum Drain Gate Voltage | -40V |
| Material | Si |
| Maximum Power Dissipation | 400mW |
| Min Operating Temperature | -65°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | H1R01 |
| EU RoHS | Yes |
| Schedule B | 8541210080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
NXP J113,126 Datasheet
Download the complete datasheet for NXP J113,126 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.