The LPC2292FET144/00,5 is a 144-pin Ball Grid Array microcontroller from NXP, featuring a RISC ARM7TDMI-S device core with 16/32-bit data bus width. It includes 112 programmable I/Os, 2 timers, and supports various interfaces such as CAN, I2C, SPI, SSP, and UART. The microcontroller is packaged in a 12mm x 12mm x 0.7mm TFBGA with a 0.8mm pin pitch, suitable for surface mount applications. Operating temperature range is not specified.
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NXP LPC2292FET144/00,5 technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 12 |
| Package Width (mm) | 12 |
| Package Height (mm) | 0.7 |
| Seated Plane Height (mm) | 1.05 |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Data Bus Width | 16|32bit |
| Instruction Set Architecture | RISC |
| Device Core | ARM7TDMI-S |
| Program Memory Type | Flash |
| Number of Programmable I/Os | 112 |
| Number of Timers | 2 |
| Interface Type | CAN/I2C/SPI/SSP/UART |
| ADC Channels | 8 |
| Cage Code | H1R01 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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