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Technical Specifications
NXP LPC4337FET100,551 technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
TFBGA
Package Description
Thin Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
100
PCB
100
Package Length (mm)
9.1(Max)
Package Width (mm)
9.1(Max)
Package Height (mm)
0.8(Max)
Seated Plane Height (mm)
1.2(Max)
Pin Pitch (mm)
0.8
Package Material
Plastic
Mounting
Surface Mount
Data Bus Width
32bit
Instruction Set Architecture
RISC
Device Core
ARM Cortex M4/M0
Program Memory Type
Flash
Number of Programmable I/Os
49
Number of Timers
6
Interface Type
CAN/Ethernet/I2C/I2S/SPI/UART/USART/USB
ADC Channels
4/4
Compliance
Cage Code
H1R01
EU RoHS
Yes
HTS Code
8542310001
Schedule B
8542310000
ECCN
EAR99
Automotive
No
AEC Qualified
No
PPAP
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
NXP LPC4337FET100,551 Datasheet
Download the complete datasheet for NXP LPC4337FET100,551 to view detailed technical specifications.
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