32-bit RISC microprocessor featuring a ColdFire device core and HCMOS process technology. Operates at a maximum speed of 25 MHz with a 4KB instruction cache and 4KB data cache. Includes multiply accumulate functionality. Housed in a 179-pin PGA package with through-hole mounting, measuring 47.75mm x 47.75mm x 3.56mm with a 2.54mm pin pitch. Suitable for operation between 0°C and 70°C.
PackagePGA
MountingThrough Hole
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Technical Specifications
NXP MC68EC040RC25 technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | PGA |
| Package/Case | PGA |
| Package Description | Plastic Pin Grid Array |
| Lead Shape | Through Hole |
| Pin Count | 179 |
| PCB | 179 |
| Package Length (mm) | 47.75 |
| Package Width (mm) | 47.75 |
| Package Height (mm) | 3.56 |
| Pin Pitch (mm) | 2.54 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Family Name | M68000 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Device Core | ColdFire |
| Maximum Speed | 25MHz |
| Process Technology | HCMOS |
| Number of CPU Cores | 1 |
| CAN | 0 |
| UART | 0 |
| USART | 0 |
| I2C | 0 |
| SPI | 0 |
| USB | 0 |
| Ethernet | 0 |
| I2S | 0 |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
| Instruction Cache Size | 4KB |
| Data Cache Size | 4KB |
| Multiply Accumulate | Yes |
Compliance
| Cage Code | H1R01 |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
NXP MC68EC040RC25 Datasheet
Download the complete datasheet for NXP MC68EC040RC25 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.