Multimedia applications processor family integrates an ARM Cortex-A8 core operating up to 800 MHz for consumer and industrial embedded products. The device supports up to 200 MHz DDR2 and mobile DDR DRAM clock rates and includes multimedia acceleration for video, image processing, audio, and graphics. On-chip interfaces include High-Speed USB On-The-Go with PHY, three High-Speed USB hosts, 10/100 Ethernet, MMC/SDIO, PATA, UART, I2C, I2S serial audio, and SIM card interfaces. Package options include 13 x 13 mm 0.5 mm pitch BGA and 19 x 19 mm 0.8 mm pitch BGA variants with lead-free RoHS-compliant construction.
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| Processor core | ARM Cortex-A8 |
| Maximum ARM core frequency | 800MHz |
| Industrial maximum ARM core frequency | 600MHz |
| DDR2 and mobile DDR clock rate | 200MHz |
| L1 instruction cache | 32KB |
| L1 data cache | 32KB |
| L2 cache | 256KB |
| 3D graphics accelerator | OpenGL ES 2.0 |
| 3D graphics triangle rate | 27Mtri/s |
| 2D graphics accelerator | OpenVG 1.1 |
| 2D graphics pixel rate | 166Mpix/s |
| Consumer case temperature range | -20 to 85°C |
| Industrial case temperature range | -40 to 95°C |
| Consumer ARM core supply voltage, high speed | 1.05 to 1.15V |
| Industrial ARM core supply voltage | 0.95 to 1.10V |
| Peripheral core supply voltage, high performance mode | 1.175 to 1.275V |
| External crystal oscillator frequency | 22 to 27MHz |
| Package option | 13 x 13 mm 0.5 mm pitch BGA, Case 2058 |
| Package option | 19 x 19 mm 0.8 mm pitch BGA, Case 2017 |
| Moisture sensitivity level | MSL 3 |
| RoHS | Compliant |
| Lead Free | Yes |
| Msl | 3 |
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These are design resources that include the NXP MCIMX51
Calibration procedure for optimizing DQS delay line settings for i.MX51 processors interfacing with Mobile DDR and DDR2 memory.
