32-bit RISC microprocessor featuring a single e500 core running at 1333 MHz. This Flip Chip Ball Grid Array (FCBGA) component offers 783 pins with a 1mm pitch, measuring 29x29x2.67mm. Integrated interfaces include multiple Ethernet (MII/RMII/RGMII, 10/100/1000Mbps), I2C, and UART. Operating voltage ranges from 1.8V to 3.3V, with a maximum operating supply of 1.155V, and a temperature range of 0°C to 105°C. Includes 32KB instruction and 32KB data cache.
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NXP MPC8548EVTAUJD technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FCBGA |
| Package Description | Flip Chip Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 783 |
| PCB | 783 |
| Package Length (mm) | 29 |
| Package Width (mm) | 29 |
| Package Height (mm) | 2.67 |
| Seated Plane Height (mm) | 3.13 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034 |
| Family Name | PowerQUICC III |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Device Core | e500 |
| Maximum Speed | 1333MHz |
| Process Technology | 0.09um |
| Core Architecture | e500 |
| Number of CPU Cores | 1 |
| Interface Type | Ethernet/I2C/UART |
| CAN | 0 |
| UART | 2 |
| USART | 0 |
| I2C | 2 |
| SPI | 0 |
| USB | 0 |
| Ethernet | 4 |
| I2S | 0 |
| Max Operating Supply Voltage | 1.155V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 105°C |
| Instruction Cache Size | 32KB |
| Data Cache Size | 32KB |
| Multiply Accumulate | No |
| Ethernet Interface Type | MII/RMII/RGMII |
| Ethernet Speed | 10Mbps/100Mbps/1000Mbps |
| Cage Code | H1R01 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 5A002.a.1 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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