Frequency40MHz
PackagePDIP
MountingThrough Hole
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Technical Specifications
NXP P89V51RD2BN,112 technical specifications.
General
| Package/Case | PDIP |
| Core Architecture | 80C51 |
| Data Bus Width | 8b |
| Frequency | 40MHz |
| Interface | SPI, UART |
| Max Frequency | 40MHz |
| Max Operating Temperature | 70°C |
| Memory Size | 64KB |
| Memory Type | FLASH, |
| Min Operating Temperature | 0°C |
| Max Power Dissipation | 1.5W |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Mount | Through Hole |
| Number of Programmable I/O | 32 |
| Number of Timers/Counters | 3 |
| Operating Supply Voltage | 5V |
| Package Quantity | 9 |
| Packaging | Rail/Tube |
| Radiation Hardening | No |
| RAM Size | 1KB |
| RoHS Compliant | Yes |
Compliance
| RoHS | Compliant |
Datasheet
NXP P89V51RD2BN,112 Datasheet
Download the complete datasheet for NXP P89V51RD2BN,112 to view detailed technical specifications.
No datasheet is available for this part.