P-channel enhancement mode power MOSFET, featuring a 30V drain-source voltage and 3.3A continuous drain current. This dual MOSFET is housed in a compact 2x2mm WDFN EP package with a 0.65mm pin pitch, suitable for surface mounting. Key specifications include a maximum gate-source voltage of ±25V, a low 3V gate threshold voltage, and a maximum drain-source on-resistance of 87mOhm at 10V. The component offers typical gate charge of 7.2nC at 10V and input capacitance of 324pF at 15V, with a maximum power dissipation of 1400mW.
PackageWDFN EP
MountingSurface Mount
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Technical Specifications
Onsemi FDMA3027PZ technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DFN |
| Package/Case | WDFN EP |
| Package Description | Very Very Thin Dual Flat Package No Lead, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 6 |
| PCB | 6 |
| Package Length (mm) | 2 |
| Package Width (mm) | 2 |
| Package Height (mm) | 0.75 |
| Seated Plane Height (mm) | 0.78 |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-229VCCC |
| Configuration | Dual |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | P |
| Number of Elements per Chip | 2 |
| Process Technology | TMOS |
| Maximum Drain Source Voltage | 30V |
| Maximum Gate Source Voltage | ±25V |
| Maximum Continuous Drain Current | 3.3A |
| Maximum Gate Threshold Voltage | 3V |
| Maximum Drain Source Resistance | 87@10VmOhm |
| Typical Gate Charge @ Vgs | 7.2@10V|4.1@5VnC |
| Typical Gate Charge @ 10V | 7.2nC |
| Typical Input Capacitance @ Vds | 324@15VpF |
| Maximum Power Dissipation | 1400mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
| Typical Output Capacitance | 59pF |
Compliance
| Cage Code | 5V1P1 |
| EU RoHS | Yes |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Onsemi FDMA3027PZ Datasheet
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