N-channel enhancement mode power MOSFET featuring a 20V drain-source voltage and 3.8A continuous drain current. This dual-configuration transistor utilizes TMOS process technology and is housed in a compact 1.6mm x 1.6mm UDFN EP package with a 0.5mm pin pitch, suitable for surface mounting. Key electrical characteristics include a maximum drain-source resistance of 66mΩ at 4.5V and a typical gate charge of 3nC. Operating across a temperature range of -55°C to 150°C, this component offers a maximum power dissipation of 1400mW.
PackageUDFN EP
MountingSurface Mount
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Technical Specifications
Onsemi FDME1024NZT technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DFN |
| Package/Case | UDFN EP |
| Package Description | Micro Dual Flat Package No Lead, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 6 |
| PCB | 6 |
| Package Length (mm) | 1.6 |
| Package Width (mm) | 1.6 |
| Package Height (mm) | 0.5(Max) |
| Seated Plane Height (mm) | 0.55(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Dual |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 2 |
| Process Technology | TMOS |
| Maximum Drain Source Voltage | 20V |
| Maximum Gate Source Voltage | ±8V |
| Maximum Continuous Drain Current | 3.8A |
| Maximum Drain Source Resistance | [email protected]mOhm |
| Typical Gate Charge @ Vgs | [email protected]nC |
| Typical Input Capacitance @ Vds | 225@10VpF |
| Maximum Power Dissipation | 1400mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | 5V1P1 |
| EU RoHS | Yes |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Onsemi FDME1024NZT Datasheet
Download the complete datasheet for Onsemi FDME1024NZT to view detailed technical specifications.
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