N-channel enhancement mode power MOSFET featuring a 30V drain-source voltage and 12A/22A continuous drain current. This dual MOSFET is housed in an 8-pin DFN EP package with exposed pad, measuring 5x6x0.5mm, designed for surface mounting. Key specifications include a 3V gate threshold voltage and a maximum power dissipation of 2200mW/2500mW. Operating temperature range is -55°C to 150°C.
PackageDFN EP
MountingSurface Mount
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Technical Specifications
Onsemi FDMS7700S technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DFN |
| Package/Case | DFN EP |
| Package Description | Dual Flat Package No Lead, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 5 |
| Package Width (mm) | 6 |
| Package Height (mm) | 0.5 |
| Seated Plane Height (mm) | 0.75 |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Dual |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 2 |
| Process Technology | TMOS |
| Maximum Drain Source Voltage | 30V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 12@Q 1|22@Q 2A |
| Material | Si |
| Maximum Gate Threshold Voltage | 3V |
| Typical Gate Charge @ Vgs | 20@10V|[email protected]@Q 1|105@10V|[email protected]@Q 2nC |
| Typical Gate Charge @ 10V | 20@Q 1|105@Q 2nC |
| Typical Input Capacitance @ Vds | 1315@15V@Q 1|7240@15V@Q 2pF |
| Maximum Power Dissipation | 2200@Q 1|2500@Q 2mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | 5V1P1 |
| EU RoHS | Yes |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Onsemi FDMS7700S Datasheet
Download the complete datasheet for Onsemi FDMS7700S to view detailed technical specifications.
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