N-channel enhancement mode power MOSFET featuring 100V drain-source voltage and 16A continuous drain current. This single element silicon transistor utilizes TMOS process technology and is housed in an 8-pin Power 56 EP surface-mount package with a 1.27mm pin pitch. Key specifications include a maximum drain-source resistance of 4.85 mOhm at 10V and a maximum power dissipation of 2700 mW, operating within a -55°C to 150°C temperature range.
PackagePower 56 EP
MountingSurface Mount
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Technical Specifications
Onsemi FDMS86150 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package/Case | Power 56 EP |
| Lead Shape | No Lead |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 5.1(Max) |
| Package Width (mm) | 6.25(Max) |
| Package Height (mm) | 0.75(Max) |
| Seated Plane Height (mm) | 0.8(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Single Quad Drain Triple Source |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Process Technology | TMOS |
| Maximum Drain Source Voltage | 100V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 16A |
| Material | Si |
| Maximum Gate Threshold Voltage | 4V |
| Maximum Drain Source Resistance | 4.85@10VmOhm |
| Typical Gate Charge @ Vgs | 25@5V|44@10VnC |
| Typical Gate Charge @ 10V | 44nC |
| Typical Input Capacitance @ Vds | 3055@50VpF |
| Maximum Power Dissipation | 2700mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
| Typical Output Capacitance | 696pF |
Compliance
| Cage Code | 5V1P1 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Onsemi FDMS86150 Datasheet
Download the complete datasheet for Onsemi FDMS86150 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.