100E SERIES, LOW SKEW CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64, LQFP-64
3.3 V, 2:1:22 Differential HSTL/PECL to HSTL Clock/Data Fanout Buffer with LVTTL Clock Select and Output Enable, 10X10X1.4 PKG .5 PITCH, 160-JTRAY
LVDS Clock Buffer, 500MHz, 3.3V, LQFP, Surface Mount, 0°C to 85°C
1-Channel LVDS Clock Buffer, LQFP-64, 0-85°C, Surface Mount
