The 32-bit Arm Cortex-M33 microcontroller family runs at up to 150 MHz for embedded applications. It integrates up to 512 KB of on-chip flash and up to 256 KB of SRAM, with package options including HLQFP100, HTQFP64, and VFBGA98. The devices include high-speed and full-speed USB host/device interfaces, SD/MMC/SDIO, nine Flexcomm serial peripherals, timers, PWM, a programmable logic unit, and a 16-bit 1.0 MSamples/s ADC. Security-oriented LPC55S2x variants add secure boot support, CASPER cryptographic acceleration, PRINCE flash encryption, PUF, HASH, AES, and debug authentication. Operation is specified from a single 1.8 V to 3.6 V supply over a -40 °C to +105 °C temperature range.
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| Core architecture | Arm Cortex-M33 |
| Maximum CPU frequency | 150MHz |
| Flash memory | Up to 512KB |
| SRAM | Up to 256KB |
| Supply voltage | 1.8 to 3.6V |
| Operating temperature | -40 to +105°C |
| USB interface | USB 2.0 full-speed and high-speed host/device |
| Flexcomm serial peripherals | Up to 9, configurable as USART, SPI, high-speed SPI, I2C, or I2S |
| I2C maximum data rate | 1 Fast-mode Plus; 3.4 high-speed slave on true I2C padsMbit/s |
| ADC resolution | 16bit |
| ADC sample rate | 1.0MSamples/s |
| ADC channels | 5 differential pairs or 10 single-ended channels |
| GPIO | Up to 64 pins depending on package |
| DMA channels | DMA0 with 23 channels; DMA1 with 10 channels |
| On-chip oscillator | 96 and 12 selectable FRO outputsMHz |
| External crystal oscillator | 16 to 32MHz |
| Security features | Secure boot, CASPER, PRINCE, PUF, HASH, AES, RSA, UUID, debug authentication |
| Package options | HLQFP100, HTQFP64, VFBGA98 |
Download the complete datasheet for NXP LPC55S2x to view detailed technical specifications.
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These are design resources that include the NXP LPC55S2x
Technical guide for flash memory operations on NXP LPC5500 MCUs, covering ROM APIs, Protected Flash Regions (PFR), and ECC-related HardFault prevention.
This application note explains how to use the Debug Authentication Protocol (DAP) on LPC55Sxx MCUs to securely authenticate debuggers using RSA-based cryptographic keys.
