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Basic Stamp 2 Interpreter Chip (SSOP)

Volume Production

Package/Case: SSOP

Core Architecture: RISC

Data Bus Width: 8b

8-Bit RISC Microcontroller, 3KB EEPROM, 136B RAM, 50MHz, DIP Package

End of Life

Address Bus Width: 8b

Package/Case: DIP

Core Architecture: RISC

Data Bus Width: 8b

8-bit Microcontrollers - MCU BASIC Stamp2E OEM In terpreter Chip (DIP)

Obsolete

Package/Case: DIP

Core Architecture: RISC

Data Bus Width: 8b

Max Frequency: 50MHz

8-Bit RISC Microcontroller with 3KB EEPROM, 136B RAM, 50MHz, SSOP

Obsolete

Package/Case: SSOP

Core Architecture: RISC

Data Bus Width: 8b

Max Frequency: 50MHz

PBASIC2SX-28/SS

8-bit RISC Microcontroller, 3KB EEPROM, 136B RAM, SSOP Package

Obsolete

Package/Case: SSOP

Core Architecture: RISC

Data Bus Width: 8b

Max Frequency: 50MHz

IC MCU BASIC STAMP 2 INTER CHIP

Obsolete

Packaging: Bulk

Basic Stamp 2 Interpreter Chip

Obsolete

Package/Case: DIP

Core Architecture: RISC

Data Bus Width: 8b

Max Operating Temperature: 70°C