Low Jitter PLL Based Multiplier/Divider with programmable delay lines down to sub 10ps 24-SSOP -40 to 85

Low Jitter PLL Based Multiplier/Divider with programmable delay lines down to sub 10ps 24-SSOP -40 to 85
3.3-V Phase-Lock Loop Clock Driver With 3-State Outputs 48-TSSOP 0 to 70