1024 X 18 asynchronous FIFO memory 80-LQFP 0 to 70
ACT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDIP24
Test-Bus Controllers IEEE Std 1149.1 (JTAG) TAP Masters With 16-Bit Generic Host Interfaces 44-PLCC -40 to 85
Bus Termination Array -40°C to 85°C 20-Pin SOIC T/R
Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-SSOP -40 to 85
ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO24
64x18 Async FIFO IC, 15ns Access, 50MHz, SSOP
512x18 Sync FIFO Memory, 12ns, 67MHz, 5V, SSOP
64x18 Sync FIFO 50MHz 13ns SSOP IC
64x18 Sync FIFO Memory, 25ns, 40MHz, 5V, SSOP
18Kb 9b Asynchronous Bidirectional FIFO IC 25ns 50MHz 5V PLCC
Dual D-Type Flip-Flop, 210MHz, 5V, TSSOP, Surface Mount
512x36 Bidirectional FIFO Memory, 11ns Access, 66.7MHz, 5V, BQFP
72Kb 36b Bidirectional FIFO Memory 66.7MHz 5V 0-70C BQFP
8-Bit Transceiver, 5V, 24mA, 9ns, TSSOP, CMOS Logic IC
4-Input NAND Gate IC, 5V, 9ns, SSOP, Surface Mount
512x18 Synchronous FIFO Memory, 20ns Access, 25MHz, 5V, SSOP
64x18 FIFO Memory, 25MHz, 20ns Access, 18-bit, SSOP
18Kb 18b Synchronous FIFO Memory 67MHz 5V 68-PLCC
Dual D Flip-Flop, 210MHz, 5.5V, SSOP, Pos Edge Trigger
