
Integrated Integer-N Synthesizer and VCO - Output Frequency 1450 to 1750

12 LVPECL/24 CMOS Output Clock Generator with Integrated 1.6 GHz VCO
24-Bit, 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers
24-Bit, 8-/16-Channel, 250 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers
32-Bit, 10 kSPS, Sigma-Delta ADC with 100 µs Settling and True Rail-to-Rail Buffers

IC TELECOM, CELLULAR, BASEBAND CIRCUIT, QCC24, 4 X 4 MM, MO-220-VGGD-2, LFCSP-24, Cellular Telephone Circuit
4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference