Dual J-/K Positive-Edge-Triggered Flip-Flops with Clear and Preset 16-PDIP 0 to 70
TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14

Triple 3-input Positive-NAND gates with open collector outputs 14-PDIP 0 to 70