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Application NoteNxp

NXP AN2029: QUICC Ethernet Address Filter Design Concept

An application note describing hardware and software methods for Ethernet address filtering using NXP QUICC and PowerQUICC communication controllers.

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Overview

This document outlines design concepts for implementing Ethernet address filtering in bridge and router applications using NXP MC68360 (QUICC) and MPC860 (PowerQUICC) processors. It evaluates three primary filtering techniques: CPU-initiated software filtering, external hardware filtering via the controller's RREJECT pin, and on-chip CAM filtering. Detailed implementation examples include using a DSP56002 digital signal processor as a programmable filter and hardware-assisted lookups using Music Semiconductor Content Addressable Memory (CAM). The note provides timing analysis for 10Mbps Ethernet frames, ensuring address recognition occurs within the 51.2-microsecond window required for short frames.

Use Cases

  • Designing Ethernet bridges
  • Implementing network routers
  • Hardware-based MAC address filtering
  • Optimizing network bandwidth in embedded systems
  • Interfacing communication controllers with external CAM

Topics

Ethernet address filtering
MC68360
MPC860
QUICC
PowerQUICC
DSP56002
Content Addressable Memory
CAM
MAC address lookup
RREJECT
network bridge

Referenced Parts

DSP56002

NXP

implementation using the Motorola DSP56002 24-bit Digital Signal Processor

MC145442

NXP

MC145442 10Base-T Enhanced Ethernet Serial Transceiver (EEST)

MC68360

NXP

The QUICC (MC68360) is the first member of a new family of Quad Integrated Communications Controllers

MCM6264

Motorola

optional single-chip MCM6264 static RAM expands the memory

MPC860

NXP

attach a MPC860 processor to the MC68360 to obtain a CPU processing power increase

MU9C1480

Music Semiconductor

Content Addressable Memory (CAM) such as the MU9C1480 LAN-CAM from MUSIC Semiconductors