3.3V Phase Lock Loop Clock Driver with 3-State Outputs 48-TSSOP 0 to 70

High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO 48-VQFN -40 to 85

2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 56-BGA MICROSTAR JUNIOR 0 to 85

Programmable 4-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs 24-TSSOP -40 to 85

Clock Buffer w/Programmable Divider, LVPECL I/O + addl LVCMOS output 16-VQFN -40 to 85
Automotive 1-Line to 10-Line Clock Driver With 3-State Outputs 24-SSOP -40 to 125
Low Jitter PLL Based Multiplier/Divider with programmable delay lines down to sub 10ps 24-SSOP -40 to 85