3.3V LVPECL/LVDS CLOCK SYNTHES
Dual 2:1 Mux/Demux, Diff, 3.3V, QCC32, SMT
89544 SERIES, 4 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, QCC32
IC SYNTHESIZR LVPECL OUT 64-TQFP
89542 SERIES, DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, QCC32
PLL Based Clock Driver, 89534 Series, 13 True Output(s), 0 Inverted Output(s), PQFP64, TQFP-64
89545 SERIES, 4 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, QCC32, 5 X 5 MM, LEAD FREE, MLF-32
IC SYNTHESIZR LVPECL/LVDS 44-MLF
IC SYNTHESIZR LVPECL/LVDS 64TQFP
Support Circuit, 1-Func, Bipolar, PQCC28
2.5GHz CML Clock Buffer, 2-OUT, 3.3V, 16-Pin QFN
2GHz 2:1 Diff Clock Buffer/Driver, QFN, 625ps PD
8-Pin MLF EP Bus Transceiver, Single Diff Receiver, 3.3/5V
Programmable Delay Line IC, 1.5GHz, 1024 Steps, 4200ps, 3.6V, QFN
Active Programmable Delay Line 1-IN 0.01ns ABS 14.8ns MAX 32-Pin TQFP Tray
Active Programmable Delay Line 2-IN 5ns ABS 7ns MAX 24-Pin QFN EP Tube
Phase Locked Loop, PDSO20, 0.300 INCH, SOIC-20
89829 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), 3 X 3 MM, EXPOSED PAD, MLF-16
