1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 52-BGA MICROSTAR JUNIOR -40 to 85

877 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40, 6 X 6 MM, 0.50 MM PITCH, PLASTIC, QFN-40

PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down Mode 8-SOIC -40 to 85
2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85

Programmable 3-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs 20-TSSOP -40 to 85

Programmable 3-PLL Clock Synthesizer / Multiplier / Divider 20-TSSOP 0 to 70