
PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down Mode 8-SOIC -40 to 85

Programmable 3-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs 20-TSSOP -40 to 85

2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85

Programmable 3-PLL Clock Synthesizer / Multiplier / Divider 20-TSSOP 0 to 70

Low-jitter PLL-based multiplier & divider with programmable delay lines down to sub 10 ps 24-SSOP -40 to 85