Dual Negative Edge Triggered J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC
Synchronous Presettable Binary Counters with Asynchronous Reset 16-CDIP -55 to 125
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125
Synchronous Presettable Binary Counters with Synchronous Reset 16-CDIP -55 to 125
Binary Counter, ACT Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, CDIP16