
Automotive PLL clock driver for synchronization, DRAM & gen-purpose apps with spread-spectrum compat 8-SOIC -40 to 85

Enhanced Product 2.5-V to 3.3-V High Performance Clock Buffer 24-TSSOP -55 to 125
857 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56, PLASTIC, VFBGA-56

2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85