
1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider 24-VQFN -40 to 85

Programmable 2-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs 16-TSSOP -40 to 85

2.5 V Phase Lock Loop DDR Clock Driver 56-BGA MICROSTAR JUNIOR -40 to 85
3.3V Phase Lock Loop Clock Driver with 3-State Outputs 48-TSSOP 0 to 70

High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO 48-VQFN -40 to 85

2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 56-BGA MICROSTAR JUNIOR 0 to 85