
2.5 V Phase Lock Loop DDR Clock Driver 56-BGA MICROSTAR JUNIOR -40 to 85
3.3V Phase Lock Loop Clock Driver with 3-State Outputs 48-TSSOP 0 to 70

2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 56-BGA MICROSTAR JUNIOR 0 to 85

High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO 48-VQFN -40 to 85

Clock Buffer w/Programmable Divider, LVPECL I/O + addl LVCMOS output 16-VQFN -40 to 85

3.3V PLL Clock Driver with 1/2x, 1x and 2x Frequency Options 28-SSOP 0 to 70