
2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 56-BGA MICROSTAR JUNIOR 0 to 85

Programmable 4-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs 24-TSSOP -40 to 85
1-to-10 LVDS clock buffer up to 900 MHz with minimum skew for clock distribution 32-LQFP -40 to 85
Low Jitter PLL Based Multiplier/Divider with programmable delay lines down to sub 10ps 24-SSOP -40 to 85

1.8V 1-to-10 High Performance Differential Clock Buffer 48-VQFN -40 to 85
Automotive 1-Line to 10-Line Clock Driver With 3-State Outputs 24-SSOP -40 to 125